Ensuring correctness in high-performance computing (HPC) applications is one of the fundamental challenges that the HPC community faces today. While significant advances in verification, testing, and debugging have been made to isolate software errors (or defects) in the context of non-HPC software, several factors make achieving correctness in HPC applications and systems much more challenging than in general systems software—growing heterogeneity (architectures with CPUs, GPUs, and special purpose accelerators), massive scale computations (very high degree of concurrency), use of combined parallel programing models (e.g., MPI+X), new scalable numerical algorithms (e.g., to leverage reduced precision in floating-point arithmetic), and aggressive compiler optimizations/transformations are some of the challenges that make correctness harder in HPC. The following report lays out the key challenges and research areas of HPC correctness: DOE Report of the HPC Correctness Summit.
As the complexity of future architectures, algorithms, and applications in HPC increases, the ability to fully exploit exascale systems will be limited without correctness. With the continuous use of HPC software to advance scientific and technological capabilities, novel techniques and practical tools for software correctness in HPC are invaluable.
The goal of the Correctness Workshop is to bring together researchers and developers to present and discuss novel ideas to address the problem of correctness in HPC. The workshop will feature contributed papers and invited talks in this area.
Topics of interest include, but are not limited to:
Authors are invited to submit manuscripts in English structured as technical or experience papers at a length of at least 6 pages but not exceeding 8 pages of content, including everything except references. Submissions must use the IEEE format.
Submitted papers will be peer-reviewed by the Program Committee and accepted papers will be published by IEEE Xplore.
Submitted papers must represent original unpublished research that is not currently under review for any other venue. Papers not following these guidelines will be rejected without review. Submissions received after the due date, exceeding length limit, or not appropriately structured may also not be considered. At least one author of an accepted paper must register for and attend the workshop. Authors may contact the workshop organizers for more information. Papers should be submitted electronically at: https://submissions.supercomputing.org/.
We encourage authors to submit an optional artifact description (AD) appendix along with their paper, describing the details of their software environments and computational experiments to the extent that an independent person could replicate their results. The AD appendix is not included in the 8-page limit of the paper and should not exceed 2 pages of content. For more details of the SC Reproducibility Initiative please see: https://sc19.qltdclient.com/submit/reproducibility-initiative/.
The proceedings will be archived in IEEE Xplore.
All time zones are AOE.
Ignacio Laguna, LLNL
Cindy Rubio-González, UC Davis
Alper Altuntas, National Center for Atmospheric Research, USA
David Bailey, LBNL & University of California, Davis, USA
Allison H. Baker, National Center for Atmospheric Research, USA
John Baugh, North Carolina State University, USA
Patrick Carribault, CEA-DAM, France
Ganesh Gopalakrishnan, University of Utah, USA
Geoffrey C. Hulette, Sandia National Laboratories, USA
Vinu Joseph, NVIDIA Corporation, USA
Michael O. Lam, James Madison University, USA
Jackson Mayo, Sandia National Laboratories, USA
Shyamali Mukherjee, Sandia National Laboratories, USA
Samuel Pollard, Sandia National Laboratories, USA
Joachim Protze, RWTH Aachen University, Germany
Emmanuelle Saillard, INRIA Bordeaux, France
Markus Schordan, Lawrence Livermore National Laboratory, USA
Tristan Vanderbruggen, Lawrence Livermore National Laboratory, USA
8:30am - 8:40am: Opening remarks |
8:40am - 9:00am: Paper 1: "Proposed Consistent Exception Handling for the BLAS and LAPACK", James Demmel, Jack Dongarra, Mark Gates, Greg Henry, Julien Langou, Xiaoye Li, Piotr Luszczek, Weslley Pereira, Jason Riedy, Cindy Rubio-González | |
9:00am - 9:20am: Paper 2: "Towards Verified Rounding-Error Analysis for Stationary Iterative Methods", Ariel Kellison, Mohit Tekriwal, Jean-Baptiste Jeannin, Geoffrey Hulette |
9:20am - 9:40am: Paper 3: "Static Local Concurrency Errors Detection in MPI-RMA Programs", Emmanuelle Saillard, Marc Sergent, Célia Tassadit Ait Kaci, Denis Barthou | |
9:40am - 10:00am: Paper 4: "On-the-Fly Data Race Detection for MPI RMA Programs with MUST", Simon Schwitanski, Joachim Jenke, Felix Tomski, Christian Terboven, Matthias S. Müller |
10:00am - 10:30am: Break |
10:30am - 11:00am: "Bug Competition Announcement", Emmanuelle Saillard |
11:00am - 11:20am: Paper 5: "MiniKokkos: A Calculus of Portable Parallelism", Feiyang Jin, John Jacobson II, Samuel D. Pollard, Vivek Sarkar | |
11:20am - 11:40am: Paper 6: "Early Experience with Transformer-Based Similarity Analysis for DataRaceBench", Winson Chen, Tristan Vanderbruggen, Pei-Hung Lin, Chunhua Liao, Murali Emani | |
11:40am - 12:00pm: Paper 7: "Leveraging the Dynamic Program Structure Tree to Detect Data Races in OpenMP Programs", Lechen Yu, Feiyang Jin, Joachim Protze, Vivek Sarkar |
Please address workshop questions to Ignacio Laguna (ilaguna@llnl.gov) and/or Cindy Rubio-González (crubio@ucdavis.edu).